
PIC18F46J50 FAMILY
DS39931D-page 122
2011 Microchip Technology Inc.
REGISTER 9-6:
PIR3: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 3 (ACCESS FA4h)
R/W-0
R-0
R/W-0
SSP2IF
BCL2IF
RC2IF
TX2IF
TMR4IF
CTMUIF
TMR3GIF
RTCCIF
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
SSP2IF:
Master Synchronous Serial Port 2 Interrupt Flag bit
1
= The transmission/reception is complete (must be cleared in software)
0
= Waiting to transmit/receive
bit 6
BCL2IF:
Bus Collision Interrupt Flag bit (MSSP2 module)
1
= A bus collision occurred (must be cleared in software)
0
= No bus collision occurred
bit 5
RC2IF:
EUSART2 Receive Interrupt Flag bit
1
= The EUSART2 receive buffer, RCREG2, is full (cleared when RCREG2 is read)
0
= The EUSART2 receive buffer is empty
bit 4
TX2IF:
EUSART2 Transmit Interrupt Flag bit
1
= The EUSART2 transmit buffer, TXREG2, is empty (cleared when TXREG2 is written)
0
= The EUSART2 transmit buffer is full
bit 3
TMR4IF:
TMR4 to PR4 Match Interrupt Flag bit
1
= TMR4 to PR4 match occurred (must be cleared in software)
0
= No TMR4 to PR4 match occurred
bit 2
CTMUIF:
Charge Time Measurement Unit Interrupt Flag bit
1
= A CTMU event has occurred (must be cleared in software)
0
= CTMU event has not occurred
bit 1
TMR3GIF:
Timer3 Gate Event Interrupt Flag bit
1
= A Timer3 gate event completed (must be cleared in software)
0
= No Timer3 gate event completed
bit 0
RTCCIF:
RTCC Interrupt Flag bit
1
= RTCC interrupt occurred (must be cleared in software)
0
= No RTCC interrupt occurred